Significant Publications

1. Pramod Yelmewad and Basavaraj Talawar, “Near Optimal Solution for Traveling Salesman Problem using GPU”, IEEE CONECCT 2018, March., 16-17, Bangalore, India.

2. Bheemappa Halavar and Basavaraj Talawar, “Accurate Performance Analysis of 3D Mesh Network on Chip Architectures”, IEEE CONECCT 2018, March., 16-17, Bangalore, India.

3. Khyamling Parane, Prabhu Prasad and Basavaraj Talawar, “FPGA based NoC Simulation Acceleration Framework Supporting Adaptive Routing”,IEEE CONECCT 2018, March., 16-17, Bangalore, India.

4. Pramod Yelmewad, Param Hanji, Amogha Udupa, Parth Shah and Basavaraj Talawar, “Parallel Computing for Iterative Hill Climbing Algorithm to solve TSP”, Poster at Student Research Symposium, 24th IEEE Intl. Conf. on High Performance Computing, Data and Analytics (HiPC SRS2017), Dec., 18-21, Jaipur, India.

5. Prabhu Prasad, Khyamling Parane and Basavaraj Talawar, "YaNoC: Yet another Network-on-Chip Simulation Acceleration Engine using FPGAs", 31st International Conference on Vlsi Design, January 8-10, 2018, Pune, India.

6. Khyamling Parane, Prabhu Prasad and Basavaraj Talawar, "FPGA based simulation acceleration for Network-on-Chips", INDOSYS 2017, IIT Bombay, India.

7. Ankur Anandapu and Basavaraj Talawar, "Fast Large Graph Algorithms on GPU", HiPC 2016, Student Research Symposium, Hyderabad, India.

8. Khyamling Parane, Prabhu Prasad and Basavaraj Talawar, "On-Chip Network Simulation Accelaration Using FPGAs", HiPC 2016, Student Research Symposium, Hyderabad, India.

9. Anagh Singh, Anamik Sarvaiya and Basavaraj Talawar, "HiMesh: A Low Power High Perfomrance Improved Architecture for 3-D On-Chip Networks", HiPC 2016, Student Research Symposium, Hyderabad, India.

10. Khyamling Parane, Prabhu Prasad and Basavaraj Talawar, "Cache Analysis and Software Optimizations for Faster On-Chip Network Simulations", Intl. Conf. on Industrial and Information Systems 2016, IIT Roorkee, Uttarakhand, India.

11. Aditya H K Upadhya, Basavaraj Talawar and Jeny Rajan, “GPU Implementation of Non-Local Maximum Likelihood Estimation Method for Denoising Magnetic Resonance Images”, Journal of Real-Time Image Processing (JRTIP), Springer, Jan 2016.

12. Basavaraj Talwar, “A Crossbar Interconnection Network in DNA”, 14th IEEE International Workshop on High Performance Computational Biology, HiCOMB 2015, Intl Parallel and Distributed Processing Symposium 2015 Workshops.

13. Avinash Kamath, Gaurangi Saxena, and Basavaraj Talawar, Analysis of Ring Topology for NoC Architecture, CoCoNet 2015, Trivandrum, Kerala, India.

14. Vikas B, Basavaraj Talawar, "On the cache behavior of SPLASH2 Benchmarks on ARM and ALPHA processors in Gem5 Full System Simulator", Intl. Conf. on Eco-friendly Computing and Communication Systems (ICECCS), December 18-21, 2014.

15. Basavaraj Talwar and Bharadwaj Amrutur, "Traffic Engineered NoC for Streaming Applications", Microprocessors & Microsystems, Elsevier, Vol. 37, Issue 3, May 2013, Pages 333-344.

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